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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
Rev. 04 -- 25 October 2004 Product data
1. Description
The PCF85116-3 is an 16 kbits (2048 x 8-bit) floating gate Electrically Erasable Programmable Read Only Memory (EEPROM). By using redundant EEPROM cells it is fault tolerant to single bit errors. In most cases multi bit errors are also covered. This feature dramatically increases reliability compared to conventional EEPROM memories. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Only one PCF85116-3 device is required to support all eight blocks of 256 x 8-bit each. Timing of the E/W cycle is carried out internally, thus no external components are required. A write-protection input at pin 7 (WP) allows disabling of write-commands from the master by a hardware signal. When pin 7 is HIGH, data in the EEPROM are protected. The data bytes received will not be acknowledged by the PCF85116-3 and the EEPROM contents are not changed. Remark: The PCF85116-3 is pin and address compatible to the PCx85xxC-2 family. The PCF85116-3 covers the whole address space of 16 kbits; address inputs are no longer needed. Therefore, pins 1 to 3 are not connected. The write-protection input (WP) is on pin 7.
2. Features
s Low power CMOS: x maximum operating current 1.0 mA x maximum standby current 10 A (at 5.5 V), typical 4 A s Non-volatile storage of 16 kbits organized as eight blocks of 256 x 8-bit each s Single supply with full operation down to 2.7 V s On-chip voltage multiplier s Serial input/output I2C-bus (100 kbit/s standard-mode and 400 kbit/s fast-mode) s Write operations: multi byte write mode up to 32 bytes s Write-protection input s Read operations: x sequential read x random read s Internal timer for writing (no external components) s Power-on reset s High reliability by using redundant EEPROM cells
Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
Endurance: 1000000 Erase/Write (E/W) cycles at Tamb = 22 C 20 years non-volatile data retention time (minimum) Pin and address compatible to the PCx85xxC-2 family ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 s Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA s Offered in DIP and SO packages s s s s
3. Quick reference data
Table 1: Symbol VDD IDDR IDDW Istb Quick reference data Parameter supply voltage supply current read supply current E/W standby supply current fSCL = 400 kHz; VDD = 5.5 V fSCL = 400 kHz; VDD = 5.5 V VDD = 2.7 V VDD = 5.5 V Conditions Min 2.7 Typ Max 5.5 1.0 1.0 6 10 Unit V mA mA A A
4. Ordering information
Table 2: Ordering information Package Name PCF85116-3P/01 PCF85116-3T/01 DIP8 SO8 Description plastic dual in-line package; 8 leads (300 mil) plastic small outline package; 8 leads; body width 3.9 mm Version SOT97-1 SOT96-1 Type number
4.1 Ordering options
Table 3: Ordering options Topside mark PCF85116-3 85116-3 Type number PCF85116-3P/01 PCF85116-3T/01
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Product data
Rev. 04 -- 25 October 2004
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Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
5. Block diagram
WP
PCF85116-3
SCL SDA 6 5 INPUT FILTER I2C-BUS CONTROL LOGIC
7
n
TEST MODE REGISTER
ADDRESS COMPARATOR
SHIFT REGISTER
ADDRESS POINTER
SEQUENCER 5
COLUMN DECODER
HV GENERATOR
PAGE REGISTER 6 VDD 8 POWER-ON-RESET EEPROM ARRAY (8 x 256 x 8) ROW DEC
DIVIDER
OSCILLATOR
4
002aaa338
VSS
Fig 1. Block diagram.
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Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
6. Pinning information
6.1 Pinning
n.c.
1
8 V DD 7 WP SCL SDA
n.c. 2
PCF85116-3
n.c. 3 VSS 4
002aaa284
6 5
Fig 2. Pin configuration.
6.2 Pin description
Table 4: Symbol n.c. n.c. n.c. VSS SDA SCL WP VDD Pin description Pin 1 2 3 4 5 6 7 8 Description not connected not connected not connected negative supply voltage serial data input/output (I2C-bus) serial clock input (I2C-bus) active HIGH write-protection input positive supply voltage
7. Device selection
Table 5: Selection Bit Device
[1]
Device selection code Device code B7[1] 1 B6 0 B5 1 B4 0 B3 Chip enable B2 B1 MEM SEL 2 MEM SEL 1 MEM SEL 0 R/W B0 R/W
The Most Significant Bit (MSB) `B7' is sent first.
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Rev. 04 -- 25 October 2004
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Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
8. Functional description
8.1 I2C-bus protocol
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The serial bus consists of two bidirectional lines; one for data signals (SDA), and one for clock signals (SCL). Both the SDA and SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined:
* Data transfer may be initiated only when the bus is not busy. * During data transfer, the data line must remain stable whenever the clock line is
HIGH. Changes in the data line while the clock line is HIGH will be interpreted as control signals. 8.1.1 Bus conditions The following bus conditions have been defined: Bus not busy -- Both data and clock lines remain HIGH. Start data transfer -- A change in the state of the data line, from HIGH-to-LOW, while the clock is HIGH, defines the START condition. Stop data transfer -- A change in the state of the data line, from LOW-to-HIGH, while the clock is HIGH, defines the STOP condition. Data valid -- The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. There is one clock pulse per bit of data. 8.1.2 Data transfer Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of the data bytes transferred between the START and STOP conditions is limited to 32 bytes in the E/W mode. Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I2C-bus specifications a standard-speed mode (100 kHz clock rate), a fast-speed mode (400 kHz clock rate) and a high-speed mode (3.2 MHz clock rate) are defined. The PCF85116-3 operates in only the standard and fast-speed modes. By definition, a device that sends a signal is called a `transmitter', and the device which receives the signal is called a `receiver'. The device which controls the signal is called the `master'. The devices that are controlled by the master are called `slaves'. Each byte is followed by one acknowledge bit. This acknowledge bit is a HIGH level, put on the bus by the transmitter. The master generates an extra acknowledge related clock pulse. The slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
The master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Set-up and hold times must be taken into account. A master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master generation of the STOP condition. 8.1.3 Device addressing Following a START condition, the bus master must output the address of the slave it is accessing. The four MSBs of the slave address are the device type identifier (see Figure 3). For the PCF85116-3 this is fixed to `1010'.
1
0
1
0
B3
B2
B1
R/W
FIXED
SOFTWARE SELECTABLE
=== &%
Fig 3. Slave address.
The next three significant bits of the slave address field (B3, B2, B1) are the block selection bits. It is used by the host to select one out of eight blocks (1 block = 256 bytes of memory). These are, in effect, the three most significant bits of the word address. The last bit of the slave address (R/W) defines the operation to be performed. When R/W is set to logic 1, a read operation is selected. 8.1.4 Write operations Byte/word write: For a write operation, the PCF85116-3 requires a second address field. This address field is a word address providing access to any one of the eight blocks of memory. Upon receipt of the word address, the PCF85116-3 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. Word address is automatically incremented. The master can now terminate the transfer by generating a STOP condition. After this STOP condition, the E/W cycle starts and the bus is free for another transmission. Its duration is a maximum of 10 ms. During the E/W cycle the slave receiver does not send an acknowledge bit if addressed via the I2C-bus. Page write: The PCF85116-3 is capable of a 32-byte page write operation. It is initiated in the same manner as the byte write operation. The master can transmit up to 32 data bytes within one transmission. After receipt of each byte, the PCF85116-3 will respond with an acknowledge. The master terminates the transfer by generating a STOP condition. The maximum total E/W time in this mode is 10 ms.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
After the receipt of each data byte, the six high-order bits of the memory address providing access to one of the 64 pages of the memory remain unchanged. The five low-order bits of the memory address will be incremented only (see Figure 4). By these five bits a single byte within the page in access is selected. By an increment the memory address may change from 31 to 0, from 63 to 32, etc. If the master transmits more than 32 bytes prior to generating the STOP condition, data within the addressed page may be overwritten and unpredictable results may occur. As in the byte write operation, all inputs are disabled until completion of the internal write cycles.
read: auto increment
B3 B2 B1
WORD ADDRESS
write: unchanged
write: auto increment
002aaa288
Fig 4. Auto-increment of memory address.
Remark: Write accesses to the EEPROM are enabled if the pin WP is LOW. When WP is HIGH the EEPROM is write-protected and no acknowledge will be given by the PCF85116-3 when data is sent. However, an acknowledge will be given after the slave address and the word address.
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
1
0
1
0 B3 B2 B1 0
A
WORD ADDRESS
A
DATA
A
DATA
A
P
SLAVE ADDRESS
R/W auto increment word address auto increment word address
=== '
Fig 5. Auto increment memory address; two byte write.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
acknowledge from slave S 1 0 1 0 B3 B2 B1 0 A R/W
acknowledge from slave A DATA N
acknowledge from slave A DATA N + 1
acknowledge from slave A
WORD ADDRESS
SLAVE ADDRESS
auto increment word address
auto increment word address
acknowledge from slave DATA N + 31 last byte auto increment word address
=== '
A
P
Fig 6. Page write operation; 32 bytes.
8.1.5
Read operations Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address (R/W) is set to logic 1. There are three basic read operations: current address read, random read, and sequential read. Remark: During read operations all bits of the memory address are incremented after each transmission of a data byte. Contrary to write operations, an overflow of the memory address occurs from 2047 to 0 (see Figure 8).
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from master
S
1
0
1
0 B3 B2 B1
0
A
WORD ADDRESS
A
S
1
0
1
0 B3 B2 B1 1
A
DATA
A
SLAVE ADDRESS
R/W
SLAVE ADDRESS
R/W
n bytes auto increment word address
at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter no acknowledge from master
DATA
1
P
last byte
=== '!
auto increment word address
Fig 7. Master reads PCF85116-3 slave after setting word address (write word address; read data); sequential read.
acknowledge from slave
acknowledge from master
no acknowledge from master
S
1 0 1 0 B3 B2 B1 1 A
DATA n bytes
A
DATA last bytes
1
P
SLAVE ADDRESS
R/W
auto increment word address
auto increment word address
002aaa294
Fig 8. Master reads PCF85116-3 immediately after first byte (read mode); current address read.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
9. Limiting values
Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDD Vi Ii Io Tstg Tamb Vesd
[1]
Parameter supply voltage input voltage on any input pin input current on any input pin output current storage temperature operating ambient temperature electrostatic discharge voltage
Conditions |Zi| > 500
Min -0.3 VSS - 0.8 -65 -40
[1]
Max +6.5 +6.5 1 10 +150 +85 -
Unit V V mA mA C C kV
2
ESD human body model Q22 at Tamb = 22 C; discharge procedure according to MIL-STD-883C Method 3015.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
10. Characteristics
Table 7: Characteristics VDD = 2.7 to 3.5 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Supplies VDD IDDR IDDW IDD(stb) supply voltage supply current read supply current E/W standby supply current fSCL = 400 kHz; VDD = 5.5 V fSCL = 400 kHz; VDD = 5.5 V VDD = 2.7 V VDD = 5.5 V SDA input/output (pin 5) VIL VIH VOL1 VOL2 ILO to(f) output leakage current output fall time from VIHmin to VILmax with up to 3 mA sink current at VOL1 with up to 6 mA sink current at VOL2 tSP Ci VIL VIH ILI fSCL tSP Ci VIL VIH tS
[1]
Parameter
Conditions
Min 2.7 -0.8 0.7VDD
Typ -
Max 5.5 1.0 1.0 6 10 0.3VDD +6.5 0.4 0.6 1 250 250 100 10 0.3VDD +6.5 1 400 100 7 0.1VDD VDD + 0.8 -
Unit V mA mA A A V V V V A ns ns ns pF V V A kHz ns pF V V years
LOW level input voltage HIGH level input voltage LOW level output voltage IOL = 3 mA; VDD(min) IOL = 6 mA; VDD(min) VOH = VDD
[1]
-
20 + 0.1Cb 20 + 0.1Cb 0 VI = VSS -0.8 0.7VDD VI = VDD or VSS 0 0 VI = VSS -0.8 0.9VDD Tamb = 55 C 20 -
pulse width of spikes suppressed by filter input capacitance LOW level input voltage HIGH level input voltage input leakage current clock input frequency pulse width of spikes suppressed by filter input capacitance LOW level input voltage HIGH level input voltage data retention time
SCL input (pin 6)
WP input (pin 7)
Data retention time
The bus capacitance ranges from 10 to 400 pF (Cb = total capacitance of one bus line in pF).
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
11. I2C-bus characteristics
Table 8: I2C-bus characteristics All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing from VSS to VDD; see Figure 9. Symbol fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT Parameter clock frequency time the bus must be free before new transmission can start START condition hold time after which first clock pulse is generated LOW level clock period HIGH level clock period set-up time for START condition data hold time for CBUS compatible masters for tSU;DAT tr tf tSU;STO
[1] [2]
Conditions
Standard mode Min 0 4.7 4.0 4.7 4.0 Max 100 1000 300 -
Fast mode Min 0 1.3 0.6 1.3 0.6 0.6 0 100 20 + 0.6 0.1Cb[2] Max 400 300 -
Unit kHz s s s s s s ns ns s ns s
repeated start
4.7 5
[1]
I2C-bus
devices
0 250 4.0
data set-up time SDA and SCL rise time SDA and SCL fall time set-up time for STOP condition
20 + 0.1Cb[2] 300
The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by a transmitter. Cb = total capacitance of one bus line in pF.
SDA
t BUF
t LOW
tf
t HD;STA
SCL
P
S
t HD;STA t HIGH
S
P
tr
t HD;DAT
t SU;DAT
t SU;STA
MBA705
t SU;STO
P = STOP condition; S = START condition.
Fig 9. Timing requirements for the I2C-bus.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
12. Write cycle limits
Table 9: Write cycle limits The power-on-reset circuit resets the I2C-bus logic with a set-up time of 10 s. Enabling the chip is achieved by connecting the WP input to VSS. Symbol tE/W Endurance NE/W E/W cycle per byte Tamb = -40 to +85 C Tamb = 22 C 100000 1000000 cycles cycles Parameter E/W cycle time Conditions Min Typ Max 10 Unit ms E/W cycle timing
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
13. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
0.010 0.057 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.041 0.228 0.016 0.024
8o o 0
Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-18
Fig 10. SO8 (SOT96-1).
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
DIP8: plastic dual in-line package; 8 leads (300 mil)
SOT97-1
D seating plane
ME
A2
A
L
A1
c Z e b1 wM (e 1) b2 5 MH
b 8
pin 1 index E
1
4
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.14 0.068 0.045 b1 0.53 0.38 0.021 0.015 b2 1.07 0.89 0.042 0.035 c 0.36 0.23 0.014 0.009 D (1) 9.8 9.2 0.39 0.36 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 1.15 0.045
Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT97-1 REFERENCES IEC 050G01 JEDEC MO-001 JEITA SC-504-8 EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-13
Fig 11. DIP8 (SOT97-1).
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
14. Soldering
14.1 Introduction
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing.
14.2 Through-hole mount packages
14.2.1 Soldering by dipping or by solder wave Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 14.2.2 Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
14.3 Surface mount packages
14.3.1 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 225 C (SnPb process) or below 245 C (Pb-free process)
- for all the BGA and SSOP-T packages
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
- for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with
a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3.2 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.3.3 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
14.4 Package related soldering information
Table 10: Mounting Through-hole mount Through-holesurface mount Surface mount Suitability of IC packages for wave, reflow and dipping soldering methods Package[1] DBS, DIP, HDIP, RDBS, SDIP, SIL PMFP[4] BGA, LBGA, LFBGA, SQFP, SSOP-T[5], TFBGA, VFBGA DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[7], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP
[1] [2]
Soldering method Wave suitable[3] not suitable not suitable Reflow[2] - not suitable suitable Dipping suitable - -
not suitable[6]
suitable
-
suitable not recommended[7][8] not recommended[9]
suitable suitable suitable
- - -
[3] [4] [5]
[6]
[7] [8] [9]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. Hot bar soldering or manual soldering is suitable for PMFP packages. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
9397 750 14217
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 04 -- 25 October 2004
18 of 21
Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
15. Revision history
Table 11: Rev Date 04 20041025 Revision history CPCN Description Product data (9397 750 14217) Modifications:
*
Table 2 "Ordering information" on page 2: - Adjusted `Type number' to include `/01' - Remove `North America' column
* *
03 20020819 -
Added Table 3 "Ordering options" on page 2 (Topside mark) Section 8.1.2 "Data transfer" on page 5: third paragraph re-written.
Product data (9397 750 10249); Engineering Change Notice 853-2356 28772; supersedes data in data sheet PCF85116-3_2 dated 1997 Apr 02 (9397 750 01994).
9397 750 14217
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 04 -- 25 October 2004
19 of 21
Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
16. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
19. Licenses
Purchase of Philips I2C components Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
18. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 14217
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 04 -- 25 October 2004
20 of 21
Philips Semiconductors
PCF85116-3
2048 x 8-bit CMOS EEPROM with I2C-bus interface
Contents
1 2 3 4 4.1 5 6 6.1 6.2 7 8 8.1 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 9 10 11 12 13 14 14.1 14.2 14.2.1 14.2.2 14.3 14.3.1 14.3.2 14.3.3 14.4 15 16 17 18 19 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Device selection. . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 I2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . . 5 Bus conditions . . . . . . . . . . . . . . . . . . . . . . . . . 5 Data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Device addressing . . . . . . . . . . . . . . . . . . . . . . 6 Write operations . . . . . . . . . . . . . . . . . . . . . . . . 6 Read operations . . . . . . . . . . . . . . . . . . . . . . . . 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 10 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 11 I2C-bus characteristics . . . . . . . . . . . . . . . . . . 12 Write cycle limits . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Through-hole mount packages . . . . . . . . . . . . 16 Soldering by dipping or by solder wave . . . . . 16 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 16 Surface mount packages . . . . . . . . . . . . . . . . 16 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 16 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 17 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 Package related soldering information . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
(c) Koninklijke Philips Electronics N.V. 2004. Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 25 October 2004 Document order number: 9397 750 14217

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